The FPGA engineer's toolbox
Interactive calculators and HDL code generators that solve the annoying ten-minute problems — FIFO sizing, CRC modules, LFSRs, baud rates. Free, instant, no signup. Every result has a shareable URL.
Tools
FIFO Depth Calculator
Minimum FIFO depth for a write burst crossing into a slower reader.
Parallel CRC Generator
Verilog & VHDL parallel CRC modules for any polynomial and data width.
LFSR Generator
Maximal-length LFSRs (2-64 bits) with ready-to-use Verilog and VHDL.
Clock Divider Calculator
Best integer divider for a target frequency, with error in ppm and RTL.
UART Baud Rate Calculator
Clock divisor, real baud rate and error % for any clock/baud pair.
Fixed-Point (Qm.n) Converter
Float to Qm.n hex/binary and back, with range, resolution and error.
Gray Code Converter
Binary <-> Gray conversion, full tables, and HDL conversion functions.
Frequency / Period Converter
MHz to ns/ps and back, with ready XDC and SDC constraint lines.
Reference
Bookmarkable cheatsheets: Verilog, VHDL, Vivado XDC, Quartus SDC and the FPGA part-number decoder.
Dev boards
Choosing hardware? The dev-board picker compares popular FPGA boards by family, logic cells and price.